1. Field of the Invention
The present invention relates to a communication apparatus which communicates digital data.
2. Description of the Related Art
The number of apparatus in which a plurality of electronic control units are built-in with microcomputers as their cores and the respective units are connected with a transmission line so as to compose a system, has increased with the advance of recent semiconductor technology for both industrial use and for private use.
It can be said that the most remarkable example of such apparatus is an electronically-controlled automobile. In an electronically-controlled automobile, such functions as engine control, steering control, change gear control, and braking control are performed by respectively independent electronic control units controlled by respective microcomputers. Regarding overall controls of a whole automobile, however, there is a case where it is necessary to transfer, between the other electronic control units concerned, respective control informations through a transmission line, as in the case of output power adjustment of an engine accompanying change gear control for lightening the so-called shift shock at the time of changing speed, for example.
FIG. 1 is a block diagram showing a configuration example of a system of an apparatus in which such a plurality of electronic control units are built-in, each unit being connected.
In FIG. 1, reference numeral 1 designates a transmission line for transmitting/receiving data, to which a plurality of electronic control units 2a, 2b . . . 2j are connected. In addition, this transmission line 1 is a line of one-bit-series, to be more concrete, a serial data transmission line of CSMA/CD (Carrier Sense Multiple Access/Collision Detection) type, for example.
In the case where such a transmission system as shown in FIG. 1 is applied to an automobile, the J-1850 standard standardized by SAE (Society of Automotive Engineers, Inc.) is already generally used as a kind of standard for data transfer between each of the electronic control units 2a, 2b . . . . Accordingly, the following explanation is done in accordance with the J-1850 standard. However, the essence of the present invention is applicable not only to the J-1850 but also to the other communication standards, of course.
FIG. 2 is a schematic diagram showing the transmission format of the J-1850 standard.
At the head field of the transmission block, start code 3 showing the start of the transmission block is positioned, and at each of the following fields, priority code 4 of one byte, transmission destination address 5 of one byte, transmission source address 6 of one byte are positioned successively, and then transmit data 7 of 0 byte through 7 byte and CRC (Cyclic Redundancy Check) code 8 of one byte for detecting data error of the block are positioned, and at the last field, end code 9 is positioned. And each communication node (each of the electronic control units 2a, 2b . . . 2j in FIG. 1 corresponds thereto) writes necessary data in each field of such a transmission block to deliver it to the transmission line 1, thereby communication is performed between each other.
By the way, in the system shown in the aforesaid FIG. 1, since one transmission line 1 is shared by all of the electronic control units 2a, 2b . . . 2j, in the case where a plurality of communication nodes, requiring transmitting at the same time, start transmitting at the same time, collision detection is carried out while the three bytes of the priority code 4, transmission destination address 5 and transmission source address 6 are delivered to the transmission line. According to one method, when a communication node, having delivered a high-priority transmission block, continues transmitting, competitive control is performed.
In the case where a communication standard such as the J-1850 standard is used, it is not practical to directly control the transmission line 1 in the intervals of primary control by the microcomputer of each of the electronic control units, since the load on the microcomputer becomes heavy. Therefore, a configuration, such that a transmission control apparatus independent from the host microcomputer is installed in each electronic control unit and the transmission control apparatus performs transmission line control such as data modulation and competition control, is widely adopted. When such a configuration is adopted, the host microcomputer only sets all kinds of parameters necessary for transmitting and data to be transmitted in the transmission control apparatus. Then the transmission control apparatus controls the transmission line 1 independently from the host microcomputer so as to perform transmitting. When receiving the transmission control apparatus controls the transmission line 1 independently, therefore the host microcomputer is only required to receive statuses such as receive data and results of transmitting/receiving. Thus, configuration can be made to have extremely little load to the host microcomputer.
FIG. 3 is a block diagram showing a configuration example of an electronic control unit using such a configuration.
In FIG. 3, the region surrounded by a dashed line corresponds to each of the electronic control units 2a, 2b . . . 2j shown in FIG. 1. Reference numeral 10 designates a host microcomputer. This host microcomputer 10 is connected with an address/control bus 11 and a data bus 12, and outputs address and control signals to the address/control bus 11 as well as transmits/receives data between itself and an external control circuit. In addition, data transfer from this host microcomputer 10 to the transmission control apparatus 14 through the data bus 12 is performed by serial data transfer.
Reference numeral 13 designates an electronic control circuit conducting engine control or variable speed control, for example, and the circuit is connected with the aforesaid address/control bus 11 and the data bus 12. Numeral 14 designates a transmission control apparatus and the apparatus is connected with the address/control bus 11 and the data bus 12 in the same way.
In the case where a host microcomputer 10 of a certain electronic control unit transmits a message or information to another electronic control unit, it specifies each register and memory (refer to FIG. 4) of the transmission control apparatus 14 through the address/control bus 11 and sets necessary data via the data bus 12, thereby it activates the transmission control apparatus 14 to deliver data. After that, the host microcomputer 10 only confirms the transmission/reception status by reading the status of the transmission control apparatus 14 at any time via the data bus 12.
FIG. 4 is a block diagram showing a configuration example of such a transmission control apparatus 14 as aforementioned.
In FIG. 4, reference numeral 15 designates a host computer interface circuit and the circuit is connected, as shown in FIG. 3, with the host microcomputer 10 through the address/control bus 11 and the data bus 12. To the host computer interface circuit 15, a reading control circuit 19, a reading multiplexer 20, writing control circuit 21 and writing temporary buffer 22 are connected.
The reading control circuit 19 is provided so as to read all kinds of data and information and read receive data from various kinds of registers to be described later by controlling switching of the reading multiplexer 20 according to the control signal given from the host microcomputer 10 through the address/control bus 11. To the reading multiplexer 20, some registers, such as a status register 161 and a receive data word number register 162, for example, among a plurality of registers constructing a register 16 or a receive data memory 18 and the like are connected. When the reading multiplexer 20 selects any of the registers or memories according to controlling by the reading control circuit 19 so as to connect with the host computer interface circuit 15, the host microcomputer 10 can read the contents of the register and memory through the data bus 12.
The writing control circuit 21 controls the writing temporary buffer 22 according to a control signal given through the address/control bus 11 from the host microcomputer 10. The writing temporary buffer 22 is provided so as to temporarily store all kinds of data and information sent from the host microcomputer 10 through the data bus 12, and writes them into various kinds of registers, to be described later, and a transmit data memory 17 after writing is synchronized with the operation inside the transmission control apparatus 14 according to control of the writing control circuit 21. To the writing temporary buffer 22, some registers such as a transmit data word number register 163, for example, and the like among a plurality of registers composing the register 16, and the transmit data memory 17 and the like are connected.
And to the writing control circuit 21, also a transmit data word counter 23 and a transmitting/receiving control circuit 26 are connected. In transmitting, the transmit data words is sent to the transmit data word counter 23 from the host microcomputer 10, and the value thereof is decremented as transmit data is stored in the transmit data memory 17. And this transmit data word number is also set in the transmit data word number register 163 in the register 16. Transmission start signal 27 is given to the transmitting/receiving control circuit 26 from the writing control circuit 21. This transmission start signal 27 is outputted in the case where the counting value of the aforesaid transmit data word number counter 23 is down-counted from the value set by the host microcomputer 10 to become "0", in other words, at the time when all of data to be transmitted is stored in the transmit data memory 17. Thereby the transmitting/receiving control circuit 26 is started to start the actual transmitting operation.
Into the transmit data memory 17, transmit data is written from the host microcomputer 10 as aforementioned. According to control from the transmitting/receiving control circuit 26, it is transmitted to the transmission line 1 from the transmitting circuit 24. And into the receive data memory 18, receive data is stored from the transmission line 1 through a receiving circuit 25 according to control from the transmitting/receiving control circuit 26.
The registers composing the register 16 are the status register 161 storing status of receive data or status of results of transmitting/receiving and the like, receive data word number register 162 storing word numbers of receive data, transmit data word number register 163 in which data word number to be transmitted is set from the host microcomputer 10 and the like.
Next, an explanation will be given of the operation of the transmission control apparatus 14 having the aforesaid configuration.
At first, the host microcomputer 10 controls the address/control bus 11 and the data bus 12 so as to read the status register 161 in the register 16 of the transmission control apparatus. And as a result, when it is judged that transmitting is possible, the host computer 10 sets each parameter for transmitting (transmit data word number and the like) in the register 16 and also writes transmit data in the transmit data memory 17. Then, when transmission start signal 27 is given to the transmitting/receiving control circuit 26, transmit data written in the transmit data memory 17 is transmitted to the transmission line 1 through the transmitting circuit 24.
The host microcomputer 10 reads the status register 161 in the register 16, and when it is judged that receiving is completed, it reads the receive data memory 18 to receive data.
The selection at the time of reading of all kinds of information and data from each register and memory inside the transmission control apparatus 14 is carried out in such a way that the reading control circuit 19 receives the content of the address/control bus 11 from the host computer interface circuit 15 and controls the reading multiplexer 20 so as to select content of a target register or memory and outputs it to the host computer interface circuit 15.
On the other hand, all kinds of information and data are written into registers and memories inside the transmission control apparatus 14 by the writing control circuit 21 after writing data outputted from the host microcomputer 10 is held temporarily in the writing temporary buffer 22, since writing is synchronized with the operation of the transmission control apparatus 14.
Controlling of the transmission line 1 is carried out by the transmitting/receiving control circuit 26. In the case where transmitting is performed to the circuit 26 itself from the transmission line 1, the circuit 26 makes the receiving circuit 25 to operate so as to store data in the receive data memory 18, and information of receive data word number, status at the time of receiving and the like are set in the register 16.
Transmitting is done in the following procedures. Since the transmit data word number is variable in this conventional example, the host microcomputer 10 at first sets it. That is, the writing control circuit 21 writes transmit data word number received from the host microcomputer 10 into the transmit data word number register 163 as well as writes it into the transmit data word number counter 23. After that, the host microcomputer 10 writes transmit data into the transmit data memory 17 successively, however, the writing control circuit 21 counts down the transmit data word number 23 one by one every time one word of transmit data is written in the transmit data memory 17. When this counting value becomes "0", writing of all transmit data into the transmit data memory 17 is completed, therefore, the writing control circuit 21 sends the transmit start signal 27 to the transmitting/receiving control circuit 26, and the transmitting/receiving control circuit 26 controls the transmitting circuit 24 so as to try transmitting.
In the case where transmitting is tried in such a way, a result of transmission failure or the like owing to collision with another transmission at the transmission line 1, is set in the status register 161 of the register 16 after finishing transmission trial. The host microcomputer 10 reads this content and performs proper processing. To be concrete, in case of transmission failure, transmit data word number is set in the register 16 again and all transmit data to be transmitted is written once more in the transmit data memory 17, thereby transmitting is tried again.
Since the conventional communication apparatus is so configured as aforementioned, when retransmitting in case of transmission failure, since the same processing should be done once more as that of the case where transmission is newly tried, the host microcomputer has a heavy load. Especially, frequent collisions owing to a large amount of transmit data amount on the transmission line results in a big problem.